Friday, July 14, 2017

Cadence eyes Japanese car makers for Tensilica DSP core with RTOS port

By Nick Flaherty www.flaherty.co.uk

Cadence Design Systems has worked with a Japanese university to port an automotive real-time operating system smart vehicles to its configurable digital signal processor core for the first time. 

It teamed up with the Embedded Real-Time System Laboratory of Nagoya University to port the AUTOSAR-compliant TOPPERS ATK2-SC1 (Toyohashi OPen Platform for Embedded Real-time Systems Automotive Kernel version-2 Scalability Class 1) to the Cadence Tensilica processors and DSPs. This is the first AUTOSAR software to be ported to the architecture, which can be configured with custom instructions, tools and software.

Nagoya University and Cadence jointly ported the ATK2-SC1 to the Tensilica processor platform, validating that it functions correctly and operates at competitive performance levels. This opens up Japanese companies working on advanced driver assistance system (ADAS), human machine interface (HMI), autonomous driving system and other automotive applications requiring the high computational capabilities of Tensilica processors.

Automotive electronic systems are increasing exponentially in complexity, making it increasingly challenging for electronic control units (ECUs) to perform their specific control functions while also connecting to the various automotive networks reliably. The AUTOSAR architecture organizes the building blocks that compose the ECU software stack, allowing multiple suppliers and OEMs to collaborate on the development of critical system components. Reuse of well-defined software components allows ECUs to be developed quickly and efficiently, and systems are becoming more heterogeneous in their deployment of processors and DSPs.

The broadly adopted and production-proven TOPPERS ATK2-SC1 real-time operating system (RTOS) automotive kernel, which manages the detailed timing of software tasks in automotive system control applications, is one of the most critical of these software building blocks. Now that Nagoya University and Cadence have ported the ATK2-SC1 to the Tensilica processor family, ECU developers can take advantage of the Tensilica DSP architectures to optimize their processors for their specific application without changing the RTOS automotive kernel. This enables them to start early development of automotive applications on the AUTOSAR OS while maintaining the high quality and dependability required for safety-critical automotive systems.

“With the growing popularity of ADAS and autonomous driving applications, automotive is becoming an increasingly promising market for the electronics industry. As a result, we are seeing growing demand for a standard platform for application development,” said Hiroaki Takada, Ph.D., a professor in the Embedded Real-Time System Laboratory at Nagoya University. “Through our recent collaboration with Cadence, we were able to validate the TOPPERS automotive kernel running on Tensilica DSPs and make it available for embedded software engineers to start their early development.”

“This collaboration with Nagoya University supports Cadence’s automotive ADAS enablement strategy and marks the first time the AUTOSAR software layer has been ported to a Tensilica processor,” said Raja Tabet, Corporate VP, Emerging Technologies at Cadence. “Many automotive applications such as radar, lidar, vision and audio/noise reduction are computationally intensive and therefore well suited to Tensilica DSPs, which are highly customizable to the specific tasks. Support for AUTOSAR via the ATK2-SC1 enables developers to take advantage of the computational benefits of Tensilica DSPs while maintaining portable, platform-independent code.”

The TOPPERS ATK2-SC1 port supports all Tensilica processors and DSPs and Cadence will be demoing the ATK2-SC1 on Tensilica processors at CDNLive Japan 2017, being held next week (July 21) in Yokohama. https://ip.cadence.com/applications/automotive/ipg-automotive.

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