Access the latest quantum technology

Quantum technology in Bristol and bath - find out more about how you can access the commercialisation of quantum technology for sensing and security

Friday, April 20, 2018

Microsemi puts FPGAs into the design verification loop

By Nick Flaherty www.flaherty.co.uk

Microsemi is working with MathWorks on an FPGA-in-the-loop (FIL) verification workflow with Microsemi's FPGA development boards. 

The integrated FIL workflow allows automatic generation of test benches for hardware description language (HDL) verification, including VHSIC Hardware Description Language (VHDL) and Verilog, providing rapid prototyping and verification of designs.

The collaboration integrates  MATLAB, a programming environment for algorithm development, data analysis, visualization and numeric computation, and Simulink, a graphical environment for simulation and Model-Based Design, with Microsemi’s SmartFusion2 system-on-chip (SoC) FPGA and PolarFire FPGA development boards. This allows the stimulation of designs through FIL verification workflow using Microsemi’s development boards, analyzing the results back in MATLAB and Simulink to modify the original design.

“With the ever-increasing complexity in algorithm designs, it has become imperative for designers to quickly design and validate their algorithms on real hardware,” said Shakeel Peera, vice president FPGA marketing for Microsemi. “This integrated FPGA-in-the-loop workflow of Microsemi FPGA boards with MathWorks HDL Verifier will allow system engineers and algorithm developers to quickly prototype and implement their MATLAB and Simulink designs on Microsemi FPGA development boards through our Libero SoC Design Suite.”

“MATLAB and Simulink are widely used by engineers to develop algorithms targeting FPGAs,” said Paul Barnard, director of marketing for the Simulink product family at MathWorks. “Now that HDL Verifier supports FIL for Microsemi development kits, engineers can connect designs implemented on these FPGA boards directly to MATLAB and Simulink test benches, streamlining a crucial validation step in developing safety-critical avionics, space and other applications.”

Delivering the industry’s first FIL feature for Microsemi boards with MATLAB and Simulink, the collaboration provides HDL Verifier Support Package for Microsemi FPGA, a hardware support package for SmartFusion2 SoC FPGA and PolarFire FPGA development boards, and an integrated workflow from algorithms to implementation. 

This works with a wide variety of applications within the aerospace and defence, security, industrial and medical markets, including motor control and imaging, digital signal processing, communication systems, machine vision and imaging systems, control systems, military communications, and payload and radio processing.

Microsemi’s SmartFusion2 and PolarFire FPGAs, and their complementary development boards, are available now, and MathWorks’ HDL Coder and HDL Verifier are also available now. 

No comments: