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Monday, May 23, 2016

Xilinx expands its 16nm UltraScale+ FPGA roadmap for new data centre technology

By Nick Flaherty

Xilinx has added new acceleration technologies for the data centre to its 16nm FinFET-based UltraScale+ product roadmap.

The integrated High-Bandwidth Memory (HBM) is combined with the recently announced Cache Coherent Interconnect for Acceleration technology (CCIX). CCIX is initially driven by a group of seven companies to enable an acceleration framework that works with multiple processor architectures. These acceleration enhanced technologies will enable efficient heterogeneous computing for the most demanding data center workloads. The new products will also be highly leveraged in many other compute intensive applications requiring high memory bandwidth.

CCIX is backed by AMD, ARM, Huawei, IBM, Mellanox and Qualcomm alongside Xilinx to provide a high-performance open acceleration framework to data centers. For the first time in the industry, a single interconnect technology specification will ensure that processors using different instruction set architectures (ISA) can coherently share data with accelerators and enable efficient heterogeneous computing – significantly improving compute efficiency for servers running data center workloads.

Applications such as big data analytics, search, machine learning, NFV, wireless 4G/5G, in-memory database processing, video analytics, and network processing, benefit from acceleration engines that need to move data seamlessly among the various system components. CCIX will allow these components to access and process data irrespective of where it resides, without the need for complex programming environments. This will enable both off-load and bump-in-the-wire inline application acceleration while leveraging existing server ecosystems and form factors, thereby lowering software barriers and improving total cost of ownership (TCO) of accelerated systems.

“AMD strongly supports development of open standards to make heterogeneous computing more pervasive,” said Gerry Talbot, AMD corporate fellow and vice president of I/O and circuit technologies. “By joining with others in the industry to develop new interconnect specifications to accelerate performance, AMD continues its commitment to open, heterogeneous computing.”

“A ‘one size fits all architecture’ approach to data center workloads does not deliver the required performance and efficiency,” said Lakshmi Mandyam, director server systems and ecosystems, ARM. “CCIX enables more optimized solutions by simplifying software development and deployment of applications that benefit from specialized processing and hardware off-load, delivering higher performance and value to data center customers.”

"IBM Power Systems have recently demonstrated a total commitment to openness as a catalyst for industry innovation, creating benefits in cost and performance to clients in a post-Moore's Law era," said Brad McCredie, IBM Fellow and Vice President of POWER Development. "IBM is committed to working with like-minded industry leaders to expand our efforts around open coherency to help meet our clients' growing cognitive needs."

Built on the TSMCs proven CoWoS process, the HBM-enabled FPGAs will improve acceleration capabilities by offering 10X higher memory bandwidth relative to discrete memory channels for the lowest possible latency. The CCIX technology promotes efficient heterogeneous computing by allowing processors with different instruction-set architectures to coherently share data with accelerators such as the HBM-enabled FPGAs.

“Having already delivered 19 billion transistors on a chip at 20nm leveraging our second generation 3D IC technology, we are creating a third generation 3D IC breakthrough for data center acceleration and other compute intensive designs,” said Victor Peng, executive vice president and general manager, Programmable Products at Xilinx. “When combined with next generation CCIX acceleration framework and our software defined SDAccel development environment, this technology will enable a new breed of high-density, flexible platforms for accelerating compute, storage and networking applications.”

“CCIX enables greater performance and connectivity capabilities over existing interconnects, and actually paves the road to the next generation CPU – Accelerator – Network standard interface,” said Gilad Shainer, vice president of Marketing at Mellanox. “With an anticipated broad eco-system support of the CCIX standard, data centers will now be able to optimize their data usage, thereby achieving world-leading applications efficiency and scale.”

“Qualcomm Technologies is excited about the development of a new technology enabling efficient, high-performance architectures in an open, ISA-agnostic platform,” said Vinay Ravuri, vice president of product management, Qualcomm Technologies, Inc. “The data center of the future demands open architectures enabling choice of compute, acceleration and interconnect technologies, and this is a significant step forward in delivering on that goal.”

“CCIX will leverage existing server interconnect infrastructure and deliver higher bandwidth, lower latency, and cache coherent access to shared memory,” said Gaurav Singh, vice president of Architecture at Xilinx. “This will result in a significant improvement in the usability of accelerators and overall performance and efficiency of data center platforms.”
Xilinx is already collaborating with leading hyperscale data center customers to create optimized configurations and products.

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