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Wednesday, August 01, 2018

UltraSoC teams with SEGGER's J-Link on debug

By Nick Flaherty www.flaherty.co.uk

Deeply embedded debug IP developer UltraSoc has teamed up with SEGGER to provide much more detailed embedded development tools.

UltraSoC will support the SEGGER J-Link debug probes within UltraSoC’s integrated system on chip (SoC) monitoring and analytics environment. These are amongst the industry’s most widely-used and support the debug of popular processor platforms including RISC-V, and both current and legacy Arm cores. The partnership gives SoC developers easy access to J-Link via a single interface when debugging using UltraSoC’s flexible on-chip monitoring and analytics infrastructure.

The UltraSoC IP provides an open and accessible vendor-agnostic environment that suits the preferences of individual engineers in terms of processor architecture, development tools and hardware. In supporting the widest range of platforms and tools within its framework, UltraSoC opens the advantages of its embedded analytics platform to more designers, who benefit from faster development time, accelerated debug, and reduced risks and costs.

The integration of full support for SEGGER’s J-Link probes means that probe configuration and debug monitoring can take place under a single environment. In using UltraSoC’s embedded analytics, designers will get insights into the CPU’s operation, both during the design process and later in-field, as part of the wider system design.

UltraSoC CEO Rupert Baines commented, 
“Chip designers, like all engineers, want to be able to select the best tools for the job," said Rupert baines, CEO of UltraSoC. "We are partnering with best-in-class hardware and software vendors to ensure our mutual customers can maximize their potential for productivity and innovation. As one of the leading names in our industry, SEGGER fits perfectly within that strategy. As we support more and more customers on the open-source RISC-V platform, the need for flexibility and openness increases significantly. The industry is changing, and collaboration across the ecosystem is now more essential than ever.”

Harald Schober, Director Sales/Marketing at SEGGER, adds: “We are delighted to be working with UltraSoC – we share the commitment to provide the best tools to support designers of the key proprietary and open-source CPU architectures. Our two companies already share customers and we expect this to grow rapidly on RISC-V as well as other platforms. Enabling access to the SEGGER J-Link functionality from within the UltraSoC environment makes perfect sense.”

SEGGER introduced the J-Link to the Arm market in 2004 and became the supplier of the industry standard debug probe for Arm developers, and has recently added RISC-V support. In working across different platforms, in most cases the J-Link only requires a minor software/firmware update: there is no need to buy a new J-Link probe or a new license when switching to a different supported CPU family or tool-chain. All J-Link models are fully compatible, come with unlimited free upgrades, and users upgrading to a higher-end model can simply plug-and-play.

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