Monday, September 11, 2006

Samsung pushes back the memory boundaries with 40nm, 32Gbit flash

Samsung is certainly pushing back the boundaries on memory technology with a 32Gbit NAND flash memory and launched its bid for the next generation of NOR flash technology. As the largest maker of memory, it does seem to be doing what it has to in order to keep ahead.
Since the 1Gbit and 4Gbit generations, as an industry we have become immune to the awe of the density of these devices. A 32Gb NAND flash memory can now be used in memory cards with densities of up to 64Gbytes, storing over 64 hours of DVD resolution movies (40 movies) or 16,000 MP3 music files (1,340 hours).
Using a 40nm process and a Charge Trap Flash (CTF) architecture for the first time, where the data is temporarily placed in a "holding chamber" of the non-conductive layer of the flash memory composed of silicon nitride, rather than using a control gate.
CTF reduces the noise between memory cells, which with 40nm stuctures is a major problem. Samsung says this is scalable down to 30 and even 20nm, and is only 20% larger than a standard control gate. This is a TANOS structure of tantalum, aluminum oxide (high k material), nitride, oxide and silicon, combining metal and high K for the first time in NAND flash, says the company.

Next generation NOR flash

At the same time Samsung is addressing the next generation of NOR. Current NOR flash technology used in mobile phones isn’t scaling well and will face reliability challenges in the future, so Samsung is proposing phase-change RAM (which it called PRAM and tries to call ‘perfect’ RAM – please don’t). This is similar to the chalcogenide technology that’s been in research for ten years, but the Samsung version has a vertical cell with a size half that of NOR flash and requires 20 percent fewer process steps, making it much cheaper to make. It is focussing on a 512Mit part that will start shipping in 2008 to replace traditional NOR flash.

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