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Wednesday, March 21, 2007

Altera backs low cost, high volume FPGAs for 65nm

Altera is using its low cost, high volume FPGA family as its route into production on the latest 65nm technology. Instead of trying to use one process for both the high performance and low cost families, it has designed the low cost Cyclone 3 family on TSMC's low power process.
Cyclone 3 parts (above left) started shipping this month and provides 5000 logic elements (around 30,000 gates) for as little as $4 in high volumes, which is great as most designs are between 40,000 and 100,000 gates, so most designs will fit into chips that are $10 to $20. The family runs up to 120,000 logic elements at the high end, although there is no pricing on the high end devices, expect these to be between $150 and $200. The high density parts overlap significantly with the higher performance Stratix III family which was announced last year but has still to go into production on 65nm, but the difference is mainly in the performance and the cost.
Arch competitor Xilinx has been shipping its high end Virtex 5 FPGAs on 65nm for the last six months.
Using the low power 65nm process, with power consumption as low as 0.5W which is targeting it to embedded applications such as portable software defined radio systems and low cost pico basestation designs, says Robert Blake, Altera's vice president of product marketing (above right). The family includes up to 4Mbits of memory and up to 288 digital signal processing (DSP) multipliers, with the whole family rolling out over the next six months.
Using a low power process has hit the performance of the parts, allowing LVDS up to 875MHz and 200MHz DDR2 memory interfaces, half that of the Stratix III family.

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