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Monday, March 01, 2010

Silicon Basis heads for FPGA test chip (UK Technology Startups)

Bristol startup Silicon Basis is developing a test chip for its innovative FPGA architecture that has potential to reduce the size, cost and power of a reconfigurable array to a quarter of today's devices.

The Soft Gate Array (SGA) uses a time factor to reuse each look up table in the array and the interconnect up to eight times a cycle, dramatically reducing the size of the array and so reducing the cost to well under 25% of current FPGAs.

Silicon Basis heads for FPGA test chip (UK Technology Startups)
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