How important is floating point performance for the Internet of Things? So far, most of the processing requirement has been on fixed point, mainly to keep the power consumption down as floating point is notoriously power hungry. However, the increasing need for security means there is more demand for low power encryption all the way down to the sensor node. This presents a significant challenge for the system developer.
French processor core designer Cortus has developed a single precision floating point IP core aimed at embedded systems requiring good floating point computational performance while also delivering small silicon area and low power dissipation. The FPS26 is the third in a family of products based on the Cortus v2 instruction set.
Once you have the floating point capability, which gives 10x the performance over an integer core, then new applications become possible such as MIMO for reliable (lower power) wireless connections and machine vision to reduce the amount of data that is sent over the network. Growing numbers of controllers in solar energy and industrial control requiring floating point algorithms, many applications require floating point operations executed in hardware to achieve their performance goals. Complex matrix inversion is a challenging computation in MIMO with challenges around precision, quantisation and scaling which can be mitigated by using floating point to reduce the overall power consumption.
The FPS26 IP core provides single precision floating point performance for applications such as industrial control, machine vision and MIMO wireless systems
“For companies developing intelligent ‘things’ requiring floating point algorithms, our FPS26 core offers outstanding computational performance while efficiently using silicon area”, says Michael Chapman President & CEO of Cortus. “It is an excellent fit with the industrial internet of things and with power control applications”.
Although historically embedded software has been dominated by fixed-point operations, there are cases where values may have large dynamic ranges and floating point computation is required or advantageous. Examples include matrix inversion in MIMO baseband processing, matrix multiplication and fast Fourier transforms (FFTs).
The FPS26 has a Harvard architecture, sixteen 32-bit registers and a 5-stage pipeline. It offers an IEEE 754 single precision hardware floating point unit, a pipelined parallel multiplier and a hardware divider. It supports the AXI4-Lite bus as well as Cortus APS peripherals. The small size of FPS26 makes it highly suitable for cost sensitive applications. The CPU starts at around 0.192 square mm using a 90nm technology. Using the Linpack benchmark FPS26 delivers 9.7 times better floating point performance than the APS25 integer core.
Up to eight co-processors can be added to an FPS26 core and the co-processor interface allows licensees to add custom coprocessors, for example to accelerate computations in cryptography or signal processing, without knowing details of the internals of the core. Co-processor instructions can be inserted into C-code appearing as function calls so that all the code can be developed in C, which was a key requirement of the processor design.
The APS tool chain and IDE (for C and C++) is available to licensees free of charge, and can be customised and branded for final customer use. Ports of various RTOSs are available such as FreeRTOS, Micrium uC/OSII, Micrium uC/OSIII & TargetOS.
To date well over 800 million devices have been manufactured containing Cortus processor cores.