All the latest quantum computer articles

See the latest stories on quantum computing from eeNews Europe

Thursday, September 19, 2019

First fanless 100W edge and micro servers in COM Express format

By Nick Flaherty

congatec has launched a range of 100W embedded edge and micro servers in the COM Express Type 7 Server-on-Module format for fanless operation.

The range initially targets the recently launched conga-B7E3 modules featuring 3 GHz dual-die processors of the AMD EPYC Embedded 3000 series that supports a maximum TDP thermal envelope of 100 Watt, up to 16 cores and 32 threads. 

These are the first 100W Server-on-Modules in the COM Express Basic form factor (95 x 125 mm) that now have new heat spreaders and heatpipe adapters for an efficient heatpipe cooling even of extremely low profile 1U servers. By designing systems in such a way that does not use rotating fans, it is possible to develop extremely robust embedded servers that are suitable for numerous applications at the IoT/Industry 4.0 edge.

These 100W systems can be used for 5G telecom cloudlets, Industry 4.0 servers, smart robot cell servers with collaborative robotics, autonomous robotic and logistics vehicles with high speed vision and other situational awareness sensors. The ecosystem is further suitable for virtualized on-premise equipment in harsh environments to perform functions such as industrial routing, tactile internet, firewall security and intrusion detection systems, as well as VPN technologies - optionally in combination with various real-time controls and neural network computing for Artificial Intelligence (AI).

"Embedded edge servers must meet ever increasing multifunctional performance requirements while operating in harsh environmental conditions where shocks and vibration are common. Rugged fanless system designs are thus required. Until today, this ecosystem was limited to a performance class of up to approximately 65 Watt. Now, congatec has extended the capabilities of fanless designs to conduction cooled 100 Watt systems. This enables an impressive performance boost of 53% for rugged fanless COM Express Type 7 designs," said Nano Chu, R&D Manager at congatec in Taipei.

In addition to the new cooling solutions, the range includes starter kits with the two different application-ready server-grade carrier boards conga-X7EVAL and conga-STX7 that, among other things, execute four 10 GbE interfaces, which are server-compatible with SFP+ cages for both copper and fiber optic cables. Exemplifying edge server rack and box system designs, the kits can be modified to customer specifications. Relevant hardware engineering services for embedded edge server platforms round off the congatec 100 Watt ecosystem for Server-on-Modules.

Software support includes real-time configurations to avoid latencies caused by processor-side TDP management and, above all, support for the comprehensive RAS (reliability, availability and serviceability) features common to all AMD EPYC Embedded 3000 processors. These enable the same efficient remote system monitoring, management and maintenance capabilities to optimise the total cost of ownership (TCO) in distributed deployments as known from commercial-grade data centres. 

Edge applications benefit from the hardware-integrated virtualisation and leading-edge security features of the AMD EPYC Embedded 3000 SoC that includes Secure Boot System, Secure Memory Encryption (SME) and Secure Encrypted Virtualization (SEV), as well as a secure migration channel between two SEV-capable platforms. Support is also provided for IPsec with integrated crypto acceleration. As a consequence, even the server administrator does not have access to such an encrypted Virtual Machine (VM). This is very important for the high security required by many edge server services, which must enable multi-vendor applications in Industry 4.0 automation while helping ward off sabotage attempts by hackers.

Tuesday, September 17, 2019

Qualcomm buys out RF360 for 5G front end filters

By Nick Flaherty

Qualcomm has bought out its partner in the RF360 joint venture that develops complex front end filters for 4G and 5G. 

RF360 was set up with TDK Electronics (formerly EPCOS) to develop RF front end (RFFE) filter technologies such as BAW, SAW, TC-SAW, as well as Thin Film SAW. These are used for developing and producing filters, duplexers, multiplexers for discrete, power amplifiers and diversity modules, as well as n-plexers and extractors.

The deal gives Qualcomm Technologies the complete signal chain from  modem to antenna, combining the Snapdragon 5G Modem-RF System with 5G New Radio (NR) sub-6 and mmWave solutions, integrating power amplifiers, filters, multiplexers, antenna tuning, LNAs, switching and envelope tracking products.

Qualcomm Technologies has already developed wideband envelope tracking and adaptive antenna tuning that combines the modem and RFFE aimed at future smartphone designs.

This acquisition is the final step in the signal chain. “Our goal in the formation of this joint venture was to enhance Qualcomm Technologies’ front-end solutions to enable us to deliver a truly complete solution to the mobile device ecosystem, and we have done exactly that,” said Cristiano Amon, president of Qualcomm. 

“We are excited about the strong adoption of Qualcomm Snapdragon 5G Modem-RF Systems in virtually all of our 150+ 5G design wins. Our systems approach has created a benchmark for 5G RFFE performance. I am very pleased to formally welcome to Qualcomm the talented employees of the joint venture, who already have been an integral part of the Qualcomm Technologies RFFE team, and I look forward to celebrating even more innovation as we continue to invent breakthrough technologies on the path towards a 5G connected world. Additionally, I would like to thank our long-time partner TDK. We look forward to continued opportunities to collaborate and to bring leading products from both companies to the market in the years ahead.”

TDK's interest in the joint venture was valued at $1.15bn in August 2019. The total purchase price, including the initial investment, payments to TDK based on sales by the joint venture, and development obligations, will be approximately $3.1bn.

Tuesday, September 10, 2019

German battery gigafactory ... Bosch teams for 48V hybrid batteries ... an 'invisible' solar roof for a car ... GaN transistors on a single crystal of diamond

Power news this week by Nick Flaherty at eeNews Europe

. Northvolt to build German battery gigafactory with Volkswagen

. Bosch teams with CATL on 48V hybrid battery production

. Faraday adds four battery research projects in £55m boost


. EV range boost from 'invisible' solar roof

. Coating boosts commercial lithium metal battery developments

. GaN transistors use single crystal of diamond as substrate


. First CAN FD Class 3 compatible common mode choke coil

. Rugged 80W DC-DC converter has 10 year warranty

. 600W medical power supply meets MIL-STD-810G shock and vibration

. Development and Deployment Strategies for Xilinx's RFSoC FPGA

. A Guide to Selecting Current Sensors and Transformersa

Facial recognition tech improves hail forecasts

By Nick Flaherty

The same machine learning technology used for facial recognition systems could help improve prediction of hailstorms and their severity, according to a new study from the National Centre for Atmospheric Research (NCAR) in the US.

Instead of zeroing in on the features of an individual face, scientists trained a convolutional neural network (CNN) to recognise features of individual storms that affect the formation of hail and how large the hailstones will be, both of which are notoriously difficult to predict.

The results, published in the American Meteorological Society's Monthly Weather Review, highlight the importance of taking into account a storm's entire structure, which has been hard to do with existing hail-forecasting techniques.


"We know that the structure of a storm affects whether the storm can produce hail," said NCAR scientist David John Gagne, who led the research team. "A supercell is more likely to produce hail than a squall line, for example. But most hail forecasting methods just look at a small slice of the storm and can't distinguish the broader form and structure."

"Hail - particularly large hail - can have significant economic impacts on agriculture and property," said Nick Anderson, an NSF program officer. "Using these deep learning tools in unique ways will provide additional insight into the conditions that favour large hail, improving model predictions. This is a creative, and very useful, merger of scientific disciplines."

Whether or not a storm produces hail hinges on myriad meteorological factors. The air needs to be humid close to the land surface, but dry higher up. The freezing level within the cloud needs to be relatively low to the ground. Strong updrafts that keep the hail aloft long enough to grow larger are essential. Changes in wind direction and speed at different heights within the storm also seem to play a role

But even when all these criteria are met, the size of the hailstones produced can vary remarkably, depending on the path the hailstones travel through the storm and the conditions along that path. That's where storm structure comes into play.

"The shape of the storm is really important," said Gagne. "In the past we have tended to focus on single points in a storm or vertical profiles, but the horizontal structure is also really important."

Current computer models are limited in what they can look at because of the mathematical complexity it takes to represent the physical properties of an entire storm. Machine learning offers a possible solution because it bypasses the need for a model that actually solves all the complicated storm physics. Instead, the machine learning neural network is able to ingest large amounts of data, search for patterns, and teach itself which storm features are crucial to key off of to accurately predict hail.

For the new study, Gagne trained the model using images of simulated storms, along with information about temperature, pressure, wind speed, and direction as inputs and simulations of hail resulting from those conditions as outputs. The weather simulations were created using the NCAR-based Weather Research and Forecasting model (WRF).

The machine learning model then figured out which features of the storm are correlated with whether or not it hails and how big the hailstones are. After the model was trained and then demonstrated that it could make successful predictions, Gagne took a look to see which aspects of the storm the model's neural network thought were the most important. He used a technique that essentially ran the model backwards to pinpoint the combination of storm characteristics that would need to come together to give the highest probability of severe hail.

In general, the model confirmed those storm features that have previously been linked to hail, Gagne said. For example, storms that have lower-than-average pressure near the surface and higher-than-average pressure near the storm top (a combination that creates strong updrafts) are more likely to produce severe hail. So too are storms with winds blowing from the southeast near the surface and from the west at the top. Storms with a more circular shape are also most likely to produce hail.

The next step is to also begin testing it using storm observations and radar-estimated hail, with the goal of transitioning this model into operational use as well. Gagne is collaborating with researchers at the University of Oklahoma on this project.

"I think this new method has a lot of promise to help forecasters better predict a weather phenomenon capable of causing severe damage," he said. "We are excited to continue testing and refining the model with observations of real storms."

Monday, September 02, 2019

TI builds on-chip thermal generator ... Perovskite solar cell efficiency at 21% ... Breakthrough for gallium oxide MOSFETs

Power news this week by Nick Flaherty

. Landis+Gyr teams for AI smart meter technology

. UK mobile money solar startup sees $50m investment

. TI builds on-chip thermal generator

. Perovskite solar cell efficiency tops 21 percent

. Breakthrough for gallium oxide power MOSFETs

. Hogweed boost for supercapacitors

. Four channel isolated smart switch for harsh industrial environments

. Buck-Boost DC-DC converter with 97 percent efficiency for battery designs

. Chips simplify USB power delivery hubs


. A Guide to Selecting Current Sensors and Transformers

. Two strategic recommendations for those developing sensor products

. Amkor - Power Packaging for Automotive Semiconductors – Now and Future

Chinese chip designer launches RISC-V microcontroller pin compatible with ARM devices

By Nick Flaherty

Chinese chip designer GigaDevice Semiconductor has launched its first 32bit microcontroller based around the open source RISC-V instruction set, allowing a choice of RISC-V and ARM in the same packaging.

A key factor for developers is that GigaDevice provides a complete tool chain support from MCU chips to software libraries and development boards.

The first product line of the GD32V family is the GD32VF103 series, aimed at mainstream designs with balanced performance needs and system resources. There are 14 devices in a range of packages, including QFN36, LQFP48, LQFP64 and LQFP100, and are fully compatible with existing GD32 ARM-based microcontrollers in software development and pin packaging. 

The new devices are specifically targeted for embedded applications ranging from industrial control, consumer electronics, emerging IOT, edge computing to artificial intelligence and deep learning.

The GD32VF103 family uses the Bumblebee processor core jointly developed by GigaDevice and China's leading RISC-V processor core IP provider Nuclei System Technology. This is a two-stage variable-length pipeline microarchitecture with a streamlined dynamic branch predictor and 
instruction prefetch unit and incorporates a variety of low-power design methods as well as a single-cycle hardware multiplier, hardware divider and acceleration unit for advanced computing and data processing challenges

It also includes custom instructions to optimize interrupt handling while supporting the RISC-V standard compilation tool chain, as well as Linux/Windows graphical integrated development environment. The customer interrupt design includes a 64-bit wide real-time timer and can generate timer interrupts defined by the RISC-V standard, with support of dozens of external interrupt sources, while possessing 16 interrupt levels and priorities, interrupt nesting and fast vector interrupts processing mechanism. 

A low-power management unit can support two-levels of sleep mode, and the core supports standard JTAG interfaces and RISC-V debug standards for hardware breakpoints and interactive debugging.

The GD32VF103 MCU series to operate at up to 153DMIPS at 108MHz and under the CoreMark test achieves 360 performance points, which shows a 15% performance improvement compared to the GD32 Cortex-M3 core. At the same time, the dynamic power consumption is reduced by 50% and the standby power consumption is reduced by 25%.

The chips have 16KB to 128KB of on-chip flash and 6KB to 32KB of SRAM cache, as well as gFlash patented technology, which supports high-speed  core accesses to flash in zero wait time..

The chip is powered by 2.6V-3.6V and the I/O ports can withstand 5V voltage level. It is equipped with a 16-bit advanced timer supporting three-phase PWM complementary outputs and Hall acquisition interface for vector control. Also, it has up to four 16-bit general-purpose timers, two 16-bit basic timers, and two multi-channel DMA controllers. The newly designed interrupt controller (ECLIC) provides up to 68 external interrupts and can be nested with 16 programmable priority levels to enhance the real-time performance of high-performance control.

Furthermore, the new MCUs have a variety of peripheral resources for a wide range of mainstream applications, including up to 3 USART, 2 UART, 3 SPI, 2 I2C, 2 I2S, 2 CAN2.0B, 1 USB 2.0 FS OTG and an External Bus Expansion Controller (EXMC). Among them, the newly designed I2C interface supports Fast Plus (Fm+) mode with frequencies up to 1 MHz (1Mb/s), which is twice the previous speed. The SPI interface also supports four-wire system and more transmission modes, including the easy expansion to Quad SPI for high-speed NOR Flash accesses. Additionally, the built-in USB 2.0 FS OTG interface provides multiple modes such as Device, HOST, and OTG, while the External bus expansion controller (EXMC) is more convenient to connect to external memory such as NOR Flash and SRAM.

The new product integrates two 12-bit high-speed ADCs with sampling rates up to 2.6MSPS, provides up to 16 reusable channels, supports 16-bit hardware oversampling filtering and resolution configurability and it has two 12 Bit DAC. Up to 80% of GPIOs support port remapping, which continues to meet the needs of mainstream development applications.

"GigaDevice is the benchmark for the integrated circuit industry and the prominent supplier for general purpose MCU market in China," said Hu Zhenbo, CEO of Nuclei System Technology. "The cooperation between the two parties will give RISC-V a strong base, bringing new breakthroughs and forming a new pattern for general-purpose MCUs in the AI and IOT era. We are working together with customers to achieve win-win results.”

"The RISC-V system has globally emerged and become a rapid development trend in the semiconductor industry for applications such as industrial control, Internet of Things, intelligent terminals and others," said Deng Yu, executive VP of GigaDevice, general manager of GigaDevice MCU business unit. "GigaDevice is the first in the industry to launch 32-bit general-purpose MCU products based on RISC-V architecture and continues to build and strengthen the RISC-V development ecosystem. GigaDevice will further meet the market's differentiated demand for open architecture and cost advantages. We will continuously enrich the GD32 MCU 'department store', providing more innovative choices to our customers.”

Development tools include the GD32VF103V-EVAL full-featured evaluation board along with the
GD32VF103R-START, GD32VF103C-START and GD32VF103T- TART entry-level learning boards, each one with a different chip package and number of pins for users to develop and debug their projects. In addition, GigaDevice provides the GD32VF103-BLDC motor control development board and GD-LINK debugging mass production tool to more fully integrate the GD32 RISC-V design plan.

GigaDevice also cooperates with Nuclei System Technology to provide Nuclei Studio, a free integrated development environment for GD32V MCU series. This Eclipse-based IDE integrates RISC-V related tools such as GCC and OpenOCD. Third-party partners also offer more IDE and tool options, including Huawei IoT Studio, SEGGER J-Link V10 and Embedded Studio. Embedded operating systems including μC/OS II, FreeRTOS, RT-Thread, and Huawei LiteOS are also fully integrated and can
provide connectivity with the cloud.