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Monday, October 10, 2016

CEVA looks to push ARM out of IoT chip designs

By Nick Flaherty www.flaherty.co.uk

CEVA has launched a lightweight, multi-purpose, processor IP core to streamline the design of cellular-enabled low data rate industrial and consumer loT devices. 

The CEVA-X1 IoT processor deploys a single-core DSP+CPU architecture, specifically designed to address the severe size, power and cost limitations demanded for deploying the latest LTE Cat-M1 (formerly eMTC) and Cat-NB1 (formerly NB-IoT) standards as well as future FeMTC and 5G cellular IoT use cases.

“The CEVA-X1 is a first-of-its-kind processor, custom designed to address the unique and diverse needs of connecting the IoT ecosystem," said Michael Boukaya, vice president and general manager of the Wireless Business Unit at CEVA. "Our deep knowledge in cellular and wireless connectivity allowed us to develop the industry’s lowest power processor for cellular IoT, and ensure outstanding performance for any other IoT related standard.”
The CEVA-X1 also serves as a multi-purpose, multi-mode processing hub for a range of tightly-associated IoT workloads, including Wi-Fi 802.11n, 802.11ac, Bluetooth/BLE, Zigbee/Thread, LoRa, SIGFOX, narrowband voice, GNSS and sensor fusion. Crucially, the CEVA-X1 can handle multiple processing workloads simultaneously, allowing developers complete flexibility to tailor their system to meet the requirements of any IoT use case.

“The 3GPP’s recent launch of the Cat-M1 and Cat-NB1 standards paves the way for billions of IoT devices to connect via the cellular networks in the coming years," said Will Strauss, President of Market Research Firm Forward Concepts. "The CEVA-X1 IoT processor addresses the stringent power, cost and performance constraints of this new wave of low data rate devices, offering a compelling solution upon which to develop multi-mode IoT products for this burgeoning market.”

The latest core derived from the NEW CEVA-X architecture framework, the CEVA-X1 employs an extended Instruction Set Architecture (ISA) that, in addition to DSP processing, also allows it to efficiently handle CPU software workloads, such as protocol stack and system control. Comparing EEMBC CoreMark scores, a commonly used benchmark to measure the performance of CPU processing in embedded systems, the CEVA-X1 CoreMark/MHz score of 3.3 is on par with the most commonly used CPU for IoT stacks - the ARM Cortex-M4 - which achieves a CoreMark/MHz score of 3.4. 

This effectively eliminates the requirement for a separate CPU core in the system when using the CEVA-X1, providing significant cost, power consumption and ease-of-programming benefits of a single-core approach.
The CEVA-X1 also enables further differentiation through CEVA-Connect, its advanced system control interface to offload the processor using dedicated control and data plane hardware, and automate traffic management between the CEVA-X1 and CEVA or customer proprietary hardware accelerators such as the Cat-M1 Turbo decoder.

Illustrating the use of the CEVA-X1 for low data rate, multi-purpose IoT devices, in a wearalone smartwatch use case, the complete Cat-NB1 modem including protocol stack and PHY running concurrently with GPS requires less than 150MHz, including ample headroom to handle additional functions such as sensor fusion. This exceptional performance is achieved using the CEVA-X1 together with optional dedicated Cat-NB1 instructions, optimized software libraries, protocol stacks and a peripherals subsystem which reduce the power consumption of the Cat-NB1 modem, excluding RF, by a further 30%.

The CEVA-X1 IoT processor and the optional dedicated Cat-NB1 components are available for licensing now. For more information on the CEVA-X1, visit http://launch.ceva-dsp.com/CEVA-X1.

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