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Wednesday, March 01, 2017

Hipperos boosts multicore RTOS software

By Nick Flaherty

HIPPEROS has added multicore communication support to its real time operating system (RTOS) for embedded systems.

The addition of fast multicore interprocess communication (IPC) and mixed criticality scheduling is key to operating across multiple cores. This is a particular challenge for embedded RTOS designs,  

HIPPEROS RTOS is a family of ITAR-free, highly configurable, modular and parallel real-time operating systems designed specifically for multicore platforms for the next generation of reliable, low power, hard real-time, high performance embedded systems. The modularity and configurability enables different kernels to be tailored to satisfy specific application requirements, adapting to different use cases. Its low footprint hard real-time kernel enables the smooth co-ordination of a mix of software and hardware tasks without missing a single deadline.

The new features in HIPPEROS v17.02, which also include hardware acceleration, are suited to computer vision applications for use cases such as drone navigation, medical imaging and Advanced Driver Assistance Systems (ADAS). A high video frame rate is key for many computer vision applications and RTOS hardware acceleration means that tasks can be handled by an on-board FPGA rather than the CPU as a way of achieving 90 video frames per second instead of 1-5 at best. 

Fast multicore IPC enables tasks running on different processors to speedily exchange data by message passing which is essential for parallel, multi-threaded processes that would otherwise have a major impact on system performance. With mixed criticality scheduling, both high and low criticality tasks can be run on the same board with the RTOS taking care of the critical priorities, thereby reducing the number of systems needed and overall costs, weight, power consumption etc.

“Most currently available RTOS’s in the market were not originally designed for multicores. Consequently, they do not scale well and their design is not able to cope efficiently with the challenges of multicore architectures or growing application demands which tends either to compromise safety or result in an inefficient use of computing resources,” said Ben Rodriguez, CEO and CTO of HIPPEROS. “With the announcement of HIPPEROS v17.02 we are introducing very innovative features, including hardware acceleration, fast multicore IPC and mixed criticality scheduling, that will ensure it continues to fill the multicore performance gap while remaining totally reliable for use in the next generation of high performance applications such as computer vision.”

Version 17.02 is being shown in a low power image processing application on a Sundance board with a Xilinx Zynq Ultrascale 7000 chip, using the RTOS hardware acceleration capabilities coupled with the FPGA to achieve video frame rates up to 20 times faster than using the CPU only, and parallel AES encryption on a SabreLite board.

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