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Tuesday, July 25, 2017

Chiplicity offers open source hardware for mixed signal chip designs

By Nick Flaherty

Online design platform and marketplace for community-developed intellectual property (IP) efabless has launched an open source framework for community members to create, share and commercialise mixed-signal ICs. These chips combining analogue and digital elements are a key capability for designs in the Internet of Things.

“Chiplicity is a first of its kind and extends the efabless electronics community engineering concept from IP to ICs,” said Mohamed Kassem, efabless’ co-founder and chief technology officer. “We make chip design and productising chips simple and broadly accessible. That’s why we call it Chip-licity.”

Chiplicity is essentially a development kit for integrated circuits, similar to hardware or software design kits. It includes all the tools needed for a full design cycle to design, verify, validate and prototype mixed-signal products, from idea to completed manufacturable GDSII files. 

It also offers a set of related library components — an open source chip called Hydra, analogue IP, a standardised pad frame and a serial interface (SPI). A soft variant of the PicoRV32 RISC-V CPU core, developed by open source active contributor Clifford Wolf, is part of the efabless digital library located in the beta version of CloudV.

Community members clone marketplace components into their personal workspace on the efabless MyLib repository and create new designs. Final designs can be promoted to the marketplace for sharing with others and community members can manufacture their designs as prototypes through efabless on shuttles at X-FAB. To date, the Chiplicity platform has been used internally to tapeout two ICs.

Over time, community members will be able to create and verify increasingly complex mixed-signal ASICs. Chiplicity will offer a flexible pad frame generator and additional analogue and digital IP, including a variety of microprocessor cores, additional open source IP and community-developed analogue IP blocks. efabless also will offer open source test boards as library components to validate custom analogue circuit designs.

Community members will be able to share designs under proprietary or open source licenses. efabless currently supports X-FAB’s XH035, 350 nm mixed-signal process. Its technology roadmap includes support for additional foundry processes, such as 180nm and 130nm nodes.

“Chiplicity is an essential piece of the overall ‘smart’ hardware, open innovation ecosystem,” remarks Mike Wishart, efabless’ co-founder and chief executive officer. “By combining community, open source and an innovative marketplace, we connect ideas with resources and apply a risk/reward sharing financial model that is unique to the IC industry. IC entrepreneurs can create new mixed-signal designs on limited budgets and ‘smart’ product inventors can find customised IC solutions to make their ideas commercially attractive.”

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